[etherlab-users] Etherlab example mini module
fp at igh-essen.com
Wed Jul 18 22:17:02 CEST 2007
On Mon, Jul 16, 2007 at 10:24:05AM +0200, Thomas Elste wrote:
> > I am using a chip called netX from hilscher (www.hilscher.com). It is
> > working correctly when I connect it to a TwinCAT Master (the EtherCAT
> > software from Beckhoff).
> I'm trying to use a netX (cifX-Re-50 PCI card) with the Etherlab master,
> So far I've encountered several problems, with this non Beckhoff component:
> 1. After scanning the bus, the master tries to read the netX eeprom.
> it reads the eeprom sequentially until the data word gets 0xffff. Problem
> this never happens with the netX. So the master reads, and reads ...
> I've fixed this quick and dirty by assigning a fixed eeprom size.
although the 0xffff word is demanded by the EtherCAT spec, it's a good
idea to provide a maximum eeprom size, as you did. I'll fix this in the
> 2. After the eeprom data has been read, the master tries to scan the data
> find out the slaves configuration (syncmanager config, pdos, etc.). But
> except vendor id, product code and some other numbers, the netX eeprom
> doesn't contain any configuration data. TwinCat uses the xml file delivered
> with the netX to configure it as slave. The Etherlab master seems to depend
> on the eeprom content.
Yes. Again, slaves vendors have to provide the desired EEPROM contents for
masters, which do not (or can not) use the XML slave descriptions. In
future releases, great parts of the master will be moved to user space.
Perhaps then, someone will implement the XML file parsing...
> I've fixed this by generating the eeprom content for the netX manually and
> copy it after the scan into the masters data structure (very quick and
FYI, it's also possible to generate EEPROM contents and store them to the
slave's EEPROM via the Sysfs interface.
> 3. The biggest problem, so far. The netX Ethercat firmware seems to
> just LRD/LWR (logical read and logical write) datagrams (note the
> UseLrdLwr="1" in the xml file). Whereas the master uses the LRW (logical
> read/write) datagram (combined) type. So after fixing problem 1 and 2 , the
> netX gets configured, but I was not able to exchange any process data. I've
> get this to work by assigning two domains to the netX (one for input one
> output) and use the appropriate datagram type within the master (also a
I'm not sure if it's possible to determine the slave's lack of the LWR
support via the EEPROM. If this is possible, the master could reason
with this. But this is currently not implemented, as you said.
> 4. To change the slaves status, TwinCat writes the AL control register
> with the ERR_ACK bit set, without worrying. The Etherlab master doesn't.
> causes the state change not always carried out by the netX. I've changed
Does this work for all slaves? I encountered similar problems...
> I would be happy, if someone from the developers could comment on this,
Sorry for the delay. We really had mail delivery problems...
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