[etherlab-users] How slow can a DC cycle time be?
gavin.lambert at tomra.com
Wed Oct 9 01:12:46 CEST 2019
That's really up to the specific slave, so you'll have to check its documentation. EtherCAT as a network transport has no particular limitation, other than it can't be slower than 1 Hz or you'll cause problems with 32-bit DC ambiguity. Having said that, a 1ms cycle is considered "typical" and so most slaves are probably expecting something around the order of 0.1 - 10ms by default.
Even if your particular data pattern doesn't require a faster cycle time, the slave might be internally relying on a particular minimum rate for its own activity. Some slaves also require multiple cycles to perform certain tasks or to communicate certain events, so a higher cycle time can cause significant delays.
Note that in addition to a possible minimum rate of DC sync activation, slaves typically have a watchdog that specifies a minimum rate for SM (receiving domain packets). Again, the slave itself will have a particular default value, but you can reconfigure this using the ecrt_slave_config_watchdog method. When this watchdog trips, the slave will drop from OP to SAFEOP+ERROR with an AL status code of 0x001B, indicating a loss of communication with the master.
Other AL status codes mean other things, such as not receiving SM-SYNC-SM-SYNC in strict phase (when in DC mode) or trying to configure sync timing parameters outside the acceptable range. Check the logs and consult your slave's documentation to figure out what the limits are and what the status errors you should be seeing mean.
Regarding propagation delay, you can see that in the "ethercat slaves -v" view (provided that you do not have an erroneous topology); it shows each port, when the timing sync datagram was received, and the overall delay. This does require a DC-capable slave, but it does not need to be running in DC mode.
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From: Louie Lu
Sent: Tuesday, 8 October 2019 22:47
To: etherlab-users at etherlab.org
Subject: [etherlab-users] How slow can a DC cycle time be?
Usually, DC will need a cycle time at 1ms or lower, but we don't need a cycle time that fast, we only need 20Hz ~ 50Hz, is that possible for DC?
For what I test on my driver (LAN9252), if the cycle time drop below 200Hz, it will unable to make the driver bring up from PREOP to OP, although the frame is still exchanging.
Also, SM2 sync is possible to run at 20Hz ~ 50Hz, but can I measure the propagation delay between the drivers? Is the 0x900~ reg valid even if I'm using SM2 sync mode?
I'm using Linux 4.14.67-rt40, IgH 1.5.2 w/ all unofficial patches.
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