SM0: PhysAddr 0x1000, DefaultSize  128, ControlRegister 0x26, Enable 1
SM1: PhysAddr 0x1080, DefaultSize  128, ControlRegister 0x22, Enable 1
SM2: PhysAddr 0x1100, DefaultSize    0, ControlRegister 0x24, Enable 1
  RxPDO 0x1a00 "Outputs"
    PDO entry 0x7000:01, 16 bit, "Test Out1"
    PDO entry 0x7000:02, 16 bit, "Test Out2"
SM3: PhysAddr 0x1180, DefaultSize    0, ControlRegister 0x20, Enable 1
  TxPDO 0x1600 "Inputs"
    PDO entry 0x6000:01, 16 bit, "Test In1"
    PDO entry 0x6000:02, 16 bit, "Test In2"