<div dir="ltr"><div>The bellow patch seemed to eliminate the problem. I believe the problem<br></div>relates to resetting some registers when link up is detected.<br><div><div><div><br>diff --git a/local_src/r8169-3.2/r8169.c b/local_src/r8169-3.2/r8169.c<br>
index 6df1793..a483fb5 100644<br>--- a/local_src/r8169-3.2/r8169.c<br>+++ b/local_src/r8169-3.2/r8169.c<br>@@ -1290,6 +1290,9 @@ static void __rtl8169_check_link_status(struct net_device *dev,<br> <br> if (tp->ecdev) {<br>
ecdev_set_link(tp->ecdev, tp->link_ok(ioaddr) ? 1 : 0);<br>+ spin_lock_irqsave(&tp->lock, flags);<br>+ rtl_link_chg_patch(tp);<br>+ spin_unlock_irqrestore(&tp->lock, flags);<br>
return;<br> }<br><br></div></div></div></div><div class="gmail_extra"><br><br><div class="gmail_quote">On Tue, Dec 3, 2013 at 11:56 AM, Jeroen Van den Keybus <span dir="ltr"><<a href="mailto:jeroen.vandenkeybus@gmail.com" target="_blank">jeroen.vandenkeybus@gmail.com</a>></span> wrote:<br>
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr">Perhaps try hooking up a normal eth interface to the drive and see what the autoneg comes up with using ethtool. In the past, I have had trouble interfacing an FPGA IP core to a PC Ethernet card when the core was hard wired to 100M FD instead of advertising this using autoneg. The PC card tried to autoneg and then fell back to 100M HD.<div>
<br></div><div>You could try testing with an EK1100 in between the PC and the drive.</div><span class="HOEnZb"><font color="#888888"><div><br></div><div>J.</div></font></span></div><div class="HOEnZb"><div class="h5"><div class="gmail_extra">
<br><br><div class="gmail_quote">2013/12/3 Raz <span dir="ltr"><<a href="mailto:raziebe@gmail.com" target="_blank">raziebe@gmail.com</a>></span><br>
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr"><div>I do not have ethtool over the ethercat device as it is removed. How can I tell ? eth0 is 100Mbps but it is my public interface. eth1 is my ethercat interface. <br>
<br></div><div>There is always a link. the first slave is a drive, not an io device . This drive is running xilinix with port stack and ip core of beckhof. <br>
</div><div>I am trying to debug now the realtek driver, let see...<br></div><div> <br></div><div><br></div></div><div class="gmail_extra"><div><div><br><br><div class="gmail_quote">On Tue, Dec 3, 2013 at 11:36 AM, Jeroen Van den Keybus <span dir="ltr"><<a href="mailto:jeroen.vandenkeybus@gmail.com" target="_blank">jeroen.vandenkeybus@gmail.com</a>></span> wrote:<br>
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr">It would be very useful to know whether e.g. the interfaces ended up in 100M half duplex or so. Is there a link in those cases ? What's the first EtherCAT station ? Maybe it doesn't handle autoneg properly during its reset phase ?<span><font color="#888888"><div>
<br></div><div>J.</div><div><br></div></font></span></div><div><div><div class="gmail_extra"><br><br><div class="gmail_quote">2013/12/3 Raz <span dir="ltr"><<a href="mailto:raziebe@gmail.com" target="_blank">raziebe@gmail.com</a>></span><br>
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr"><div><div>hey<br></div>Problem happens with intel e1000e as well as realtek. One way to bypass it is to boot the master while the ethernet-ethercat cable is disconnected, and once master claims the interface , connect this cable. This appears to work. <br>
</div>So , There some sort of of initialisation error.<br></div><div class="gmail_extra"><div><div><br><br><div class="gmail_quote">On Mon, Dec 2, 2013 at 11:32 AM, Raz <span dir="ltr"><<a href="mailto:raziebe@gmail.com" target="_blank">raziebe@gmail.com</a>></span> wrote:<br>
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr">I still do not have a scenario. it "sometimes" happens. The -DRTL8169_DEBUG is something i did not know, so i will check and see. thx<br>
</div><div class="gmail_extra"><div><div><br><br><div class="gmail_quote">
On Mon, Dec 2, 2013 at 11:27 AM, Jeroen Van den Keybus <span dir="ltr"><<a href="mailto:jeroen.vandenkeybus@gmail.com" target="_blank">jeroen.vandenkeybus@gmail.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
<div dir="ltr"><div>Is there a difference between cold and warm boot ? Does unloading the ec driver, loading/unloading the stock r8169 driver and then reloading the ec driver work better ? Same scenario but with Realtek drivers (r8168) ? Also perhaps compile with -DRTL8169_DEBUG ?</div>
<div><br></div><div>Just some thoughts.</div><span><font color="#888888"><div><br></div><div>J.</div></font></span></div><div><div><div class="gmail_extra"><br><br><div class="gmail_quote">
2013/12/2 Raz <span dir="ltr"><<a href="mailto:raziebe@gmail.com" target="_blank">raziebe@gmail.com</a>></span><br>
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr">The timeouts happens after the system boots and not while slaves are in in OP mode. So my transmit is irrelevant here, even though a transmit happens only from a single thread of through an ioctl ( SDO reads and so on..)<br>
<br><br></div><div class="gmail_extra"><div><div><br><br><div class="gmail_quote">On Mon, Dec 2, 2013 at 11:01 AM, Jeroen Van den Keybus <span dir="ltr"><<a href="mailto:jeroen.vandenkeybus@gmail.com" target="_blank">jeroen.vandenkeybus@gmail.com</a>></span> wrote:<br>
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr"><div class="gmail_extra"><div class="gmail_quote"><div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
<div dir="ltr"><div><div><div><br></div></div></div><div>
1. why do you disable the rtl8169_phy_timer timer ?<br></div></div></blockquote><div><br></div></div><div>The rtl8169_phy_timer is regularly polled in ec_poll instead.</div><div><div><br></div><div> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
<div dir="ltr"><div></div><div>2. In rtl_hw_start_8168 : why do disable RTL_W16(IntrMask, tp->intr_event); ?<br><br></div></div></blockquote><div><br></div></div><div>The drivers are all non-blocking and interrupt-free. All work that interrupt handlers normally do is done in ec_poll instead.</div>
<div><br></div><div>If you cannot send packets anymore, I suspect that you may have overrun the tx queue, i.e. sent a packet before the previous one has been completed. You're also not calling the ethercat transmission functions from different threads, right ?</div>
<div><br></div><div><br></div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div><div dir="ltr"><div></div><div>thank you<span><font color="#888888"><br>
raz<br>
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