[etherlab-users] Etherlab example mini module

[Thomas Elste]

Hi Philipp,

> I would greatly appreciate if you could tell me how you found the
> right eeprom contents.
No problem: I retraced the way, the master is analysing the EEPROM data
in fsm_slave.c, ec_fsm_slave_scan_state_eeprom_data(...) and the _fetch_
functions in slave.c. Then I used all the data from the netX XML file
to generate the EEPROM data. Later, after all the analysing work was
done of course, I discovered the document
EtherCATDeviceDescription_V0i3i0.pdf on the ETGs website, describing
exactly the data structures in the EEPROM, :).

> Or is it maybe possible to send me a copy of
> your code or sth?
No problem there. In the meantime I implemented a way of an extended
slave configuration (not very nice, as the slave config has to be
known at the compile time of the master), but should be working
nevertheless. I have some code cleanup and testing left to do,
but I hope I'll be able to send you some patch on monday, maybe
tuesday.

For the LRW - LRD/LWR thing it will take a little longer to come up
with something that works with more slaves then one netX on the bus.
But I'll try next week.


Greets
Thomas



-- 
Dipl.-Inf. Thomas Elste

Institut fuer Mikroelektronik- und Mechatronik-Systeme gGmbH
Ehrenbergestraße 27, 98693 Ilmenau, Germany