[etherlab-users] EL1252 Pdo entry not byte-align

[Christian Gieseler]

Hello,

i have a problem to get the second Channel of EL1252 running.
With debug enabled i get the message that the Pdo entry 0x6000:02 is not 
byte-aligned. But what can i do about this as i can't change the 
Settings of the EL1252. How do i handle this with the Master?

dmesg output says:

EtherCAT DEBUG: Creating slave configuration for 0:3, 0x00000002/0x04E43052.
EtherCAT DEBUG: Attached slave 3 to config 0:3.
EtherCAT DEBUG: ecrt_slave_config_reg_pdo_entry(sc = 0xdf63f800, index = 
0x6000, subindex = 0x01, domain = 0xdefb2ac0, bit_position = 0x0)
EtherCAT DEBUG: Domain 0: Added 1 bytes, total 5.
EtherCAT DEBUG: ecrt_master_slave_config(master = 0xdeff3800, alias = 0, 
position = 3, vendor_id = 2, product_code = 82063442)
EtherCAT DEBUG: ecrt_slave_config_reg_pdo_entry(sc = 0xdf63f800, index = 
0x6000, subindex = 0x02, domain = 0xdefb2ac0, bit_position = 0x0)
EtherCAT ERROR: Pdo entry 0x6000:02 does not byte-align in config 0:3.
ec_mini: Pdo entry registration failed!
ec_mini: Releasing master...

=== pdos of EL1252 === given by ethercat pdos command:
SM0: PhysAddr 0x1000, DefaultSize    0, ControlRegister 0x22, Enable 0
   TxPdo 0x1a00 "Channel 1"
     Pdo entry 0x6000:01,  1 bit, "Input"
   TxPdo 0x1a01 "Channel 2"
     Pdo entry 0x6000:02,  1 bit, "Input"
     Pdo entry 0x0000:00,  6 bit, ""
   TxPdo 0x1a02 "Reserved"
SM1: PhysAddr 0x09ae, DefaultSize    0, ControlRegister 0x00, Enable 4
   TxPdo 0x1a13 "Latch"
     Pdo entry 0x1d09:ae,  8 bit, "Status1"
     Pdo entry 0x1d09:af,  8 bit, "Status2"
     Pdo entry 0x1d09:b0, 64 bit, "LatchPos1"
     Pdo entry 0x1d09:b8, 64 bit, "LatchNeg1"
     Pdo entry 0x1d09:c0, 64 bit, "LatchPos2"
     Pdo entry 0x1d09:c8, 64 bit, "LatchNeg2"
SM2: PhysAddr 0x0910, DefaultSize    0, ControlRegister 0x00, Enable 4


This is my configuration in my module. Is there any mistake?

static unsigned int off_EL1252_Kanal1_TX;
static unsigned int off_EL1252_Kanal2_TX;

const static ec_pdo_entry_reg_t domain1_regs[] = {
	...
	{EL1252Pos, EL1252, 0x6000,1,&off_EL1252_Kanal1_TX},
	{EL1252Pos, EL1252, 0x6000,2,&off_EL1252_Kanal2_TX},
	{}

static ec_pdo_entry_info_t EL1252_pdo_entries [] = {
	{0x6000,1,1},//{pdo entry index,pdo entry subindex, size of pdo entry 
in bit}
	{0x6000,2,1},
	{0x0000,0,6},
	{0x1d09,174,8},
	{0x1d09,175,8},
	{0x1d09,176,64},
	{0x1d09,184,64},
	{0x1d09,192,64},
	{0x1d09,200,64}
};

static ec_sync_info_t EL1252_syncs [] ={
	{0,EC_DIR_INPUT,3,EL1252_pdos},//{Sync manager Index, direction, number 
of pdos, array with pdos to assign}
	{1,EC_DIR_INPUT,1,EL1252_pdos+3},
	{0xff}
};

Regards Christian