[etherlab-users] further investigations on NetX500 slave

Phil Sutter sutter at informatik.hs-furtwangen.de
Wed Mar 5 15:57:55 CET 2008 

Hi,

On Tue, Mar 04, 2008 at 09:51:28AM +0100, Florian Pose wrote:
> Just to clarify things, the table lists the byte-addresses of the data,
> the SII uses word-addressing. Moreover the field EEPROM size (byte
> 0x000E--0x000F) is definitely wrong (correct would be the checksum). The
> rest of the data are ok, except the EEPROM address... ;-) Please use the
> official documents to avoid such misunderstandings inn the future.

Ok, thanks for the hint. Maybe I should send an email to the author, as
the discussed document is actually being used for teaching students.

> I'll have to correct you, the latter one definitely little-endian.
> Little endian (as used on Intel-Architectures and in the EtherCAT
> protocol means increasing numeric significance with increasing memory
> addresses. The whole master is based on this fact. ;-)

It's a mess. I wonder why for four years studying informatics my
misunderstanding never attracted attention. Seems like I always ignored
the important word "first" before "byte order".

> Ok, the SII tells us, that there was an error during the last command
> executed (bit 5 of the second octet). Could you please repeat the test
> by switching the slave's power supply off and on again and so letting
> the master scan again? My interest is on the first read operation after
> a power cycle. With this information, I can contact Hilscher and ask for
> it.

I did so. Interestinly, I got two different logs depending on whether I
waited a bit (~10-15 seconds) after loading ec_e1000.ko before powering
on the slave. This is the log when waiting:

| 05.03.2008 14:49:15 usb 3-2: new full speed USB device using uhci_hcd and address 7
| 05.03.2008 14:49:15 usb 3-2: configuration #1 chosen from 1 choice
| 05.03.2008 14:49:22 e1000: ec0: e1000_watchdog: NIC Link is Up 100 Mbps Full Duplex, Flow Control: RX
| 05.03.2008 14:49:22 EtherCAT: Link state changed to UP.
| 05.03.2008 14:49:22 EtherCAT: 1 slave responding.
| 05.03.2008 14:49:22 EtherCAT: Scanning bus.
| 05.03.2008 14:49:22 EtherCAT DEBUG: reading SII data:
| 05.03.2008 14:49:22 EtherCAT DEBUG: 80 01 40 00
| 05.03.2008 14:49:22 EtherCAT DEBUG: checking SII read state:
| 05.03.2008 14:49:22 EtherCAT DEBUG: C0 20 40 00 00 00 00 00 00 00
| 05.03.2008 14:49:22 EtherCAT ERROR: SII: Error on last SII command!
| 05.03.2008 14:49:22 EtherCAT ERROR: Failed to read EEPROM size of slave 0.
| 05.03.2008 14:49:22 EtherCAT: Bus scanning completed in 0 ms.

and this log containing additional lines when plugging the slave in
right after loading ec_e1000.ko:

| 05.03.2008 14:50:23 usb 3-2: new full speed USB device using uhci_hcd and address 8
| 05.03.2008 14:50:23 usb 3-2: configuration #1 chosen from 1 choice
| 05.03.2008 14:50:31 e1000: ec0: e1000_watchdog: NIC Link is Up 100 Mbps Full Duplex, Flow Control: RX
| 05.03.2008 14:50:31 EtherCAT: Link state changed to UP.
| 05.03.2008 14:50:31 EtherCAT: 1 slave responding.
| 05.03.2008 14:50:31 EtherCAT: Scanning bus.
| 05.03.2008 14:50:31 EtherCAT DEBUG: reading SII data:
| 05.03.2008 14:50:31 EtherCAT DEBUG: 80 01 40 00
| 05.03.2008 14:50:31 EtherCAT DEBUG: checking SII read state:
| 05.03.2008 14:50:31 EtherCAT DEBUG: C0 81 40 00 00 00 00 00 00 00
| 05.03.2008 14:50:31 EtherCAT DEBUG: checking SII read state:
| 05.03.2008 14:50:31 EtherCAT DEBUG: C0 81 40 00 00 00 00 00 00 00
| 05.03.2008 14:50:31 EtherCAT DEBUG: checking SII read state:
| 05.03.2008 14:50:31 EtherCAT DEBUG: C0 81 40 00 00 00 00 00 00 00
| 05.03.2008 14:50:31 EtherCAT DEBUG: checking SII read state:
| 05.03.2008 14:50:31 EtherCAT DEBUG: C0 20 40 00 00 00 00 00 00 00
| 05.03.2008 14:50:31 EtherCAT ERROR: SII: Error on last SII command!
| 05.03.2008 14:50:31 EtherCAT ERROR: Failed to read EEPROM size of slave 0.
| 05.03.2008 14:50:31 EtherCAT: Bus scanning completed in 0 ms.

from reading the source, I assumed that before every "checking SII read
state" message there will be a "reading SII data" message. Is this
wrong, or does the master just receive three packets without explicitly
having requested them?

> EEPROM contents to write must have an even data size (word-alignment)
> and have to be at least 41 words (40 fixed words + 1 delimiter). I
> improved the error messages. So try appending an 0xFFFF word.

After doing that, the master accepts the image and starts writing, but
eventually fails. This is the log:

| 05.03.2008 15:31:45 EtherCAT WARNING: EEPROM CRC incorrect. Must be 0xd9.
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 00 00 00 00 80 01 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 01 00 00 00 01 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 02 00 00 00 00 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 03 00 00 00 00 0F 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 04 00 00 00 00 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 05 00 00 00 00 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 06 00 00 00 00 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 07 00 00 00 A4 88 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 08 00 00 00 44 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 09 00 00 00 00 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 0A 00 00 00 6E 65 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 0B 00 00 00 74 78 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 0C 00 00 00 01 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 0D 00 00 00 03 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 0E 00 00 00 00 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 0F 00 00 00 00 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 10 00 00 00 00 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 11 00 00 00 00 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 12 00 00 00 00 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 13 00 00 00 00 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 14 00 00 00 00 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 15 00 00 00 00 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 16 00 00 00 00 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 17 00 00 00 00 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 18 00 00 00 00 10 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 19 00 00 00 80 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 1A 00 00 00 00 11 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 1B 00 00 00 80 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 1C 00 00 00 00 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 1D 00 00 00 00 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 1E 00 00 00 00 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 1F 00 00 00 00 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 20 00 00 00 00 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 21 00 00 00 00 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 22 00 00 00 00 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 23 00 00 00 00 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 24 00 00 00 00 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 25 00 00 00 00 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 26 00 00 00 00 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 27 00 00 00 00 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 28 00 00 00 00 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 29 00 00 00 00 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 2A 00 00 00 00 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 2B 00 00 00 00 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 2C 00 00 00 00 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 2D 00 00 00 00 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 2E 00 00 00 00 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 2F 00 00 00 00 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 30 00 00 00 00 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 31 00 00 00 00 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 32 00 00 00 00 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 33 00 00 00 00 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 34 00 00 00 00 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 35 00 00 00 00 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 36 00 00 00 00 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 37 00 00 00 00 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 38 00 00 00 00 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 39 00 00 00 00 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 3A 00 00 00 00 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 3B 00 00 00 00 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 3C 00 00 00 00 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 3D 00 00 00 00 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 3E 00 00 00 00 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 3F 00 00 00 01 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 00 
| 05.03.2008 15:31:45 EtherCAT DEBUG: writing SII data:
| 05.03.2008 15:31:45 EtherCAT DEBUG: 81 02 40 00 00 00 FF FF 
| 05.03.2008 15:31:45 EtherCAT DEBUG: checking SII write state:
| 05.03.2008 15:31:45 EtherCAT DEBUG: C1 40 
| 05.03.2008 15:31:45 EtherCAT ERROR: SII: Write operation failed!
| 05.03.2008 15:31:45 EtherCAT ERROR: Failed to write EEPROM data to slave 0.
| 05.03.2008 15:32:39 EtherCAT WARNING: 193 datagrams TIMED OUT!

Greetings, Phil

More information about the Etherlab-users mailing list