[etherlab-users] Slave register access

[William Montgomery]

Florian Pose wrote:
> Hi,
>
> On Wed, Nov 05, 2008 at 03:31:17PM -0500, William Montgomery wrote:
>   
>> I followed your suggestions but I do not think the slave controller ASIC 
>> (Beckhoff ET1100) handles the register access via sync manager in the 
>> expected way.  I am not getting any sync pulses.
>>     
>
> could it be, that the sync manager waits for a distributed-clocks event?
> Have a look at
>
> http://lists.etherlab.org/pipermail/etherlab-users/2008/000190.html
>
> and the two following postings. Perhaps this is the problem, too.
>
>   
I read the postings in the link above and looked at the ET1100 manual on 
the referenced page.  I could find no mention that the sync manager 
waits for a DC event. 

In my research of the associated register definitions I found a way to 
give me the pulses I needed.  When using the ET1100 SPI interface it is 
possible to have the ET1100 generate a interrupt signal to the PDI 
(SPI_INT) on completetion of a write sequence to a memory block 
controlled by a sync manager.  I set this up in the SII and now I am 
getting my pulse without having to write directly to any register but 
simply by doing the normal cyclic accesses.

Thanks for the helpful pointer.

Regards,
Wm