[etherlab-users] Problems with Reinit of EtherCAT Master

[Dieter.Schaffner at ids.de]

Hello to all,

we want to use Hot-Connect of segments with GroupID switches from Beckhoff and IDS with EtherLAB master. With this functionality we are very flexible in topology and topology changes.
So we can swap segments
We have the following Use-Case:


-          Detect topology change (simple)

-          Stop Ethercat data exchange

-          Deactivate master to clean up the parameterization

-          Reinitialize the master

The behavior is now if one slave in a segment is not known, or parameterization of a slave in a segment  is missing the whole segment will stay in PREOP.

But when we pull the last slave or segment the Master may have a problem (see error log below)

Example :

# ethercat sl
0  0:0   OP  +  CU78B Prozessor Modul)                                                  => always Group 0
1  0:1   OP  +  cDI73A 8K. Dig. Eingang 24V, 3ms
2  0:2   OP  +  cDI73A 8K. Dig. Eingang 24V, 3ms
3  0:3   OP  +  cSI71A 2K. Ser. Schnittstelle (RS232)
4  0:4   OP  +  cDO73A 8K. Dig. Ausgang 24V, 0.5A
5  0:5   OP  +  cCI71A 2K. +/- Zaehler 24V, 1kHz
6  0:6   OP  +  EK1521 1-Port EtherCAT-Abzweig (FX-MultiMode)
7  0:7   OP  +  cEC71B EtherCAT-Koppler (2A E-Bus, FX-MultiMode, ID-Switch)             => Group ID switch 17
8  0:8   OP  +  cDI73A 8K. Dig. Eingang 24V, 3ms
9  0:9   OP  +  cDI73A 8K. Dig. Eingang 24V, 3ms
10  0:10  OP  +  cAI71A 2K. Ana. Eingang 0-20mA, DIFF
11  0:11  OP  +  cPC70A PROFIBUS DP Master
12  0:12  OP  +  cEE70A EtherCAT-Verl�ngerung
13  0:13  OP  +  EK1101 EtherCAT-Koppler (2A E-Bus, ID-Switch)                           => Group ID switch 33
14  0:14  OP  +  cDI73A 8K. Dig. Eingang 24V, 3ms
15  0:15  OP  +  cDO73A 8K. Dig. Ausgang 24V, 0.5A
16  0:16  OP  +  cAO71A 2K. Ana. Ausgang 0-20mA, 16bit
17  0:17  OP  +  cAI72A 4K. Ana. Eingang  0-20mA, DIFF             -> if this slave will disappear then it is O.K.
18  0:18  OP  +  cEC71A EtherCAT-Koppler (2A E-Bus)                                      => NO Group ID switch -> to ID 0
19  0:19  OP  +  cDI73A 8K. Dig. Eingang 24V, 3ms
20  0:20  OP  +  cDI73A 8K. Dig. Eingang 24V, 3ms
21  0:21  OP  +  cDO73A 8K. Dig. Ausgang 24V, 0.5A
22  0:22  OP  +  cCI70A 2K. +/- Zaehler 24V, 100kHz
23  0:23  OP  +  cAO71A 2K. Ana. Ausgang 0-20mA, 16bit
24  0:24  OP  +  cEC71B EtherCAT-Koppler (2A E-Bus, FX-MultiMode, ID-Switch)             => Group ID switch 49
25  0:25  OP  +  cDO73A 8K. Dig. Ausgang 24V, 0.5A
26  0:26  OP  +  cDI73A 8K. Dig. Eingang 24V, 3ms                  -> if this slave will disappear then there is an error

#
#
#

After Reinit O.K. by pulling slave 17:

#
# ethercat sl
0  0:0   OP     +  CU78B Prozessor Modul
1  0:1   OP     +  cDI73A 8K. Dig. Eingang 24V, 3ms
2  0:2   OP     +  cDI73A 8K. Dig. Eingang 24V, 3ms
3  0:3   OP     +  cSI71A 2K. Ser. Schnittstelle (RS232)
4  0:4   OP     +  cDO73A 8K. Dig. Ausgang 24V, 0.5A
5  0:5   OP     +  cCI71A 2K. +/- Zaehler 24V, 1kHz
6  0:6   OP     +  EK1521 1-Port EtherCAT-Abzweig (FX-MultiMode)
7  0:7   OP     +  cEC71B EtherCAT-Koppler (2A E-Bus, FX-MultiMode, ID-Switch)
8  0:8   OP     +  cDI73A 8K. Dig. Eingang 24V, 3ms
9  0:9   OP     +  cDI73A 8K. Dig. Eingang 24V, 3ms
10  0:10  OP     +  cAI71A 2K. Ana. Eingang 0-20mA, DIFF
11  0:11  OP     +  cPC70A PROFIBUS DP Master
12  0:12  OP     +  cEE70A EtherCAT-Verl�ngerung
13  0:13  PREOP  +  EK1101 EtherCAT-Koppler (2A E-Bus, ID-Switch)                     => group ID 33 is defect
14  0:14  PREOP  +  cDI73A 8K. Dig. Eingang 24V, 3ms
15  0:15  PREOP  +  cDO73A 8K. Dig. Ausgang 24V, 0.5A
16  0:16  PREOP  +  cAO71A 2K. Ana. Ausgang 0-20mA, 16bit
17  0:17  OP     +  cEC71A EtherCAT-Koppler (2A E-Bus)
18  0:18  OP     +  cDI73A 8K. Dig. Eingang 24V, 3ms
19  0:19  OP     +  cDI73A 8K. Dig. Eingang 24V, 3ms
20  0:20  OP     +  cDO73A 8K. Dig. Ausgang 24V, 0.5A
21  0:21  OP     +  cCI70A 2K. +/- Zaehler 24V, 100kHz
22  0:22  OP     +  cAO71A 2K. Ana. Ausgang 0-20mA, 16bit
23  0:23  OP     +  cEC71B EtherCAT-Koppler (2A E-Bus, FX-MultiMode, ID-Switch)
24  0:24  OP     +  cDO73A 8K. Dig. Ausgang 24V, 0.5A
25  0:25  OP     +  cDI73A 8K. Dig. Eingang 24V, 3ms
#
#

After Reinit Error by pulling the last slave:

#
# ethercat sl
0  0:0   PREOP  +  0x00000000:0x00000000
1  0:1   PREOP  +  0x00000000:0x00000000
2  0:2   PREOP  +  0x00000000:0x00000000
3  0:3   PREOP  +  0x00000000:0x00000000
4  0:4   PREOP  +  0x00000000:0x00000000
5  0:5   PREOP  +  0x00000000:0x00000000
6  0:6   PREOP  +  0x00000000:0x00000000
7  0:7   PREOP  +  0x00000000:0x00000000
8  0:8   PREOP  +  0x00000000:0x00000000
9  0:9   PREOP  +  0x00000000:0x00000000
10  0:10  PREOP  +  0x00000000:0x00000000
11  0:11  PREOP  +  0x00000000:0x00000000
12  0:12  PREOP  +  0x00000000:0x00000000
13  0:13  PREOP  +  0x00000000:0x00000000
14  0:14  PREOP  +  0x00000000:0x00000000
15  0:15  PREOP  +  0x00000000:0x00000000
16  0:16  PREOP  +  0x00000000:0x00000000
17  0:17  PREOP  +  0x00000000:0x00000000
18  0:18  PREOP  +  0x00000000:0x00000000
19  0:19  PREOP  +  0x00000000:0x00000000
20  0:20  PREOP  +  0x00000000:0x00000000
21  0:21  PREOP  +  0x00000000:0x00000000
22  0:22  PREOP  +  0x00000000:0x00000000
23  0:23  PREOP  +  0x00000000:0x00000000
24  0:24  PREOP  +  0x00000000:0x00000000
25  0:25  PREOP  +  0x00000000:0x00000000
#
#

Do you know if this is a known bug?

Best regards,
Dieter

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