[etherlab-users] Performance rating of jitter on PC System

[Armin Steinhoff]

Hello,

what you can expect from PC based hardware shows the OASDL testbed:

https://www.osadl.org/Continuous-latency-monitoring.qa-farm-monitoring.0.html

The results are havely depending on the target motherboards ...

IMHO, small jitters are only possible if the Ethernet controller ( e.g.
i210) drives at hardware level the bus cyccle.

Regards

--Armin


Marcel Rothgänger wrote:
> Hello everybody,
>
> I have some problems with jitter on the following system:
>
> ASUS P7P55D-E with Intel(R) Core(TM) i7 CPU 860 @ 2.80GHz
> 82574L Gigabit Network Connection with e1000e
> RTL8111/8168B PCI Express Gigabit Ethernet controller with r8169
> 8 GB RAM
>
> Which possible jitter minimum at 250µs cycle time do you expect? What should
> be possible on this system?
>
> As OS I use Ubuntu 10.04.4 and patched the Kernel with RT PREEMPT
> 2.6.31.6-rt19. Both NIC were tried with both native and generic driver (for
> e1000e on another RT Kernel).
>
> The application is the adapted user sample with RT PREEMPT timing. Cycle
> time 250 µs (4 kHz). Abstract below. On the oscilloscope I can see very
> different signal Jitter of 20µs – 70µs. The Jitter depends on system load
> e.g. mouse moving, window moving etc. The ambition is all OS services like
> screensaver, window moving and so on should surge but not my cyclic task.
>
> I am interested in your system hardware configuration, the OS, cycle time
> and of course your jitter. I think it can help to improve our system.
>
> Regards,
> Marcel
>
>
> Maybe the idea of timing and cyclic task below is not the best:
>
>
>     printf("Started.\n");
>
>     clock_gettime(CLOCK_MONOTONIC ,&t);
>        
>     /* start after one second */
>         t.tv_sec++;
>
>         while(1) {
>                 /* wait until next shot */
>                 clock_nanosleep(CLOCK_MONOTONIC, TIMER_ABSTIME, &t, NULL);
>
>                 /* do the stuff */
>                 cyclic_task();
>
>                 /* calculate next shot */
>                 t.tv_nsec += interval;
>
>                 while (t.tv_nsec >= NSEC_PER_SEC) {
>                        t.tv_nsec -= NSEC_PER_SEC;
>                         t.tv_sec++;
>                 }
>    }
>
>
>
>
>
>
> void cyclic_task()
> {
>     int i;
>
>     // receive process data
>     ecrt_master_receive(master);
>     ecrt_domain_process(domain1);
>
>    blink = !blink;
>    if (counter) {
>         counter--;
>     } else { // do this at 1 Hz
>         counter = FREQUENCY;
>
>         check_master_state();
>     }
>
>     // write process data
>     EC_WRITE_U8(domain1_pd + off_dig_out, blink ? 0x06 : 0x09);
>
>     // send process data
>     ecrt_domain_queue(domain1);
>     ecrt_master_send(master);
> }
>
>
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