[etherlab-users] Twincat communicate with yaskawa SGDV alarm A12 (Sync Error)

Gavin Lambert gavinl at compacsort.com
Tue Jun 2 02:52:17 CEST 2015

FWIW, while I could be wrong about this, as far as I know it’s generally a bad idea to explicitly set the reference clock slave.  It defaults to being the first DC-capable slave on the network, and you shouldn’t set it to any other slave because of the way the DC sync datagrams work.  Specifically, any DC-capable slaves that are topologically earlier than the reference clock will not receive the reference clock’s time, but instead whichever value happens to have been initialised by the master (I haven’t checked exactly what this will be but I expect it’s probably either zero or the master’s time).  As a result these slaves will be desynched with the rest of the network.


Of course, you can get away with this if you don’t care about the DC times of any slaves prior to the selected reference clock, but it still seems like a bad habit unless there’s a very good reason to select some specific device (eg. known as a “better” clock) – but then you should try to get it as early in the network as possible.


Also, you’re not supposed to call ecrt_master_application_time() before ecrt_master_activate(); the master is expecting that the first application_time it receives is in phase with the application loop – ideally as close to the ecrt_master_send() call as possible.  (The examples don’t really make this clear, but the goal is to make the ecrt_master_send()call at as close to the desired cycle time as possible.  The sleep is at the other end of the loop because there is a natural delay between send and receive anyway and because the assumption is that the processing time is reasonably constant.)


From: etherlab-users [mailto:etherlab-users-bounces at etherlab.org] On Behalf Of Graeme Foot
Sent: Tuesday, 2 June 2015 11:45
To: 陈成细; etherlab-users at etherlab.org
Subject: Re: [etherlab-users] Twincat communicate with yaskawa SGDV alarm A12 (Sync Error)




1) If your cycle time is 4ms, I think it should instead be:

0x60C2, 0x01 = 4

0x60C2, 0x02 = -3



  ecrt_slave_config_sdo8(dev->slaveConfig, 0x60C2, 0x01, (uint8_t)4);

  ecrt_slave_config_sdo8(dev->slaveConfig, 0x60C2, 0x02, (int8_t)(-3));


Where the first parameter is the significand and the second parameter is the exponent.  So:

(0x60C2, 0x01) * 10 ^ (0x60C2, 0x02)  =  4 * 10 ^ -3  =  0.004 seconds  =  4 ms



2) I’m currently patching against 1.5.2 (2526).  Yes it is still quite old but I haven’t needed to (or had the time) to move on.  I don’t think any of my patches have made it into the master.  My current DC patch is: etherlabmaster-1.5.2-2526-c_dc_helpers.patch (attached).  There is still the odd issue with some of the slaves taking a while to sync on startup.  This has been solved by other people but I haven’t had a chance to add it in myself yet.


I don’t think the EK1100, EL1008 and EL2008 modules are able to be set up as DC slaves, but they can be used as the reference clock slave.


Before starting realtime polling I set the reference clock slave using (where refSlaveConfig is the slaveConfig of the module I select via a config file):

  ecrt_master_select_reference_clock(ecMod->master, refSlaveConfig);


This is after ecrt_master_application_time() and before ecrt_master_activate().



My realtime loop is:


  // receive process data



  // process domain data

  for (i = 0; i < EC_DOMAIN_COUNT; i++)





  // check domain state, check master state



  // prepare pdo data



  // send process data

  for (i = 0; i < EC_DOMAIN_COUNT; i++)





  // always sync distributed clock (just before master_send)



  // do the send



  // update the master clock (if this module provides the ref slave)

  // Note: called after ecrt_master_send to reduce time jitter




My syncDistClock function gets the current ref slave time and requests the slaves to sync to the ref slave:


  // cache prev master time and get now

  masterTime      = (uint32_t)ecMod->m_dcTime;

  ecMod->m_dcTime = filterTime( rt_get_time_ns() );


  // get lower 32 bit of clock time from reference slave (after first scan)

  if (ecMod->m_getDCDiff)


    int      res;

    uint32_t slaveTime;

    res = ecrt_master_reference_clock_time(ecMod->master, &slaveTime);


    switch (res)


      case 0 :


        // calc time diff

        ecMod->m_dcDiff = masterTime - slaveTime;

      } break;


      default :


        // no ref clock found or datagram failure

        ecMod->m_dcDiff = 0;






    ecMod->m_dcDiff    = 0;

    ecMod->m_getDCDiff = true;



  // call to sync slaves to ref slave 

  // (which is used for ecrt_master_reference_clock_time)



  // update the master time for the next cycle (in nano-seconds)

 // (this is required for the master to figure out the modules initial

  //  dc time)

  ecrt_master_application_time(ecMod->master, ecMod->m_dcTime + g_app.scanTimeNS);



My updateMasterClock function is responsible for tracking and filtering the master time drift.  This drift is added to the rtai time.  So whenever I need to get an rtai time I need to wrap it in the filterTime() function.  When I need the realtime cycle to sleep for the next period (using rt_sleep_until(wakeTime)) the wake time is adjusted by the filtered time.



(Note: error checking removed to hopefully make clearer)



I hope this helps,






From: 陈成细 [mailto:crazyintermilan at gmail.com] 
Sent: Friday, 29 May 2015 2:19 p.m.
To: Graeme Foot
Subject: Re: Twincat communicate with yaskawa SGDV alarm A12 (Sync Error)


Dear Graeme Foot,

Thanks for your kindly guide in the mailing list and private email. In the recently half year, I do on the track and make in progress to drive my yaskawa servopack and servo motor via etherlab master.

First of all, I would like update my status to you. 

1. I create three domain, readdomain, write domain for yaskawa, another domain for others.

2. I can make motor rotate in free run mode without setup DC

3. Two times success to drive motor with DC, others 5000ms sync error

My setup:

ubuntu 14.04, xenomai real time kernel, etherlab1.52 stable 

I do my homework already, and I think the answer already in the mailing list, so I have several point need to make clear.

1. <http://lists.etherlab.org/pipermail/etherlab-users/2012/001562.html> post you mention 


Yes I have thanks.  My cycle time is 1ms.  I have set:
0x60C2, 0x01 = 1
0x60C2, 0x02 = -3 


My cycle time use 4ms, I set 

0x60C2, 0x01 = 01
0x60C2, 0x02 = FD

refer to


2. Regarding DC patch <http://thread.gmane.org/gmane.network.etherlab.user/1421>, do you have latest patch for etherlab1.52 stable, since it is years ago, or already merged into 1.52?

I understand that 5000ms sync error caused by DC time offset calculation inaccurate. First of all, I select yaskawa slave as reference clock, then sync master to reference clock? If I add EK1100, EL1008, and EL2008, also I have to sync these slaves to reference clock?

As now my implement in my loop as follow:

// send process data 

  // update application time
  master->app_time += master->app_time_period;
  ecrt_master_application_time(master->master, master->app_time);
  // sync ref clock to master
  if (master->sync_ref_cycles > 0) {
    if (master->sync_ref_cnt == 0) {
      master->sync_ref_cnt = master->sync_ref_cycles;
  // sync slaves to ref clock
  // send domain data

As follow <http://lists.etherlab.org/pipermail/etherlab-users/2014/002461.html>, I have to use 

ecrt_master_reference_clock_time()instead of ecrt_master_sync_reference_clock(master->master).
Sorry, I am totally lost here. And should select slave as reference clock outside loop?




On Fri, Aug 29, 2014 at 11:52 AM, 陈成细 <crazyintermilan at gmail.com <mailto:crazyintermilan at gmail.com> > wrote:

Dear Graeme,

Thank you for your reply, it is really helpful.

My whole system only one set yaskawa servopack and motor, maybe i have to read out cycle time of servopack , and set twincat the same cycle time.

Since i bought second hand yaskawa SGDV servopack, i just want use twincat to confirm that my servopack can work well and to configure .xml.

It seems quite headache, i will try to fix it anyway.

Best regards!



On Fri, Aug 29, 2014 at 8:25 AM, Graeme Foot <Graeme.Foot at touchcut.com <mailto:Graeme.Foot at touchcut.com> > wrote:



I've never tried using TwinCAT with the SGDV drives.  The drives are quite unforgiving if your master cycle is a bit out of sync or has reasonable jitter, so the only way I got mine to be happy was to use a slave as the distributed clock master and I sync the EtherCAT master to that.  I believe this is also the default method for TwinCAT but there is possibly some setup required to tell it which slave should be the DC master and also which slave should then also be running in DC mode.


My DC clock master slave is generally an EL1008 module, but only because this is the first slave we have that supports it.  From memory we used to use a EK1100 coupler but I think I recall having some issues where it wasn't stable enough for some reason.


The main thing is to always maintain consistent and as much as possible jitter free communications.  I'm not sure how to do that with TwinCAT.







From: 陈成细 [mailto:crazyintermilan at gmail.com <mailto:crazyintermilan at gmail.com> ] 
Sent: Thursday, 28 August 2014 14:07
To: Graeme Foot
Subject: Twincat communicate with yaskawa SGDV alarm A12 (Sync Error)


Dear Graeme,

Currently i am trying to connect twincat with yaskawa SGDV driver, I meet CoE- Emergency then synchronization error. After I search from website, luckily i read your posts (http://article.gmane.org/gmane.network.etherlab.user/1378/match= ). 

Since i am just start to learn ethercat as a hobby, first step i use tool TwinCat to communicate with SGDV driver follow the manual(https://www.google.com.sg/url?sa=t <https://www.google.com.sg/url?sa=t&rct=j&q=&esrc=s&source=web&cd=2&cad=rja&uact=8&ved=0CCMQFjAB&url=https%3A%2F%2Fwww.yaskawa.com%2Fpycprd%2Flookup%2Fgetdocument%2FjvgyvE5ZTUY_5CC1znzBof23DM0-2qtf20mzhvc2NVVttd_tKgqgkH4jzlPaKN9jwUZxdmOOXgfix7X3yhLYM72qJQdo3XppBhywnUPr1Oy7mtRZ76i_VGFJpKtk9N9SimCMNzyqbNZCaOJGSoV4BG4Gs6GA9Tys&ei=JY3-U9rQJI6UauyUgJAO&usg=AFQjCNHSkmEEGvsiw09L8yuCE1L46XrLEQ&bvm=bv.74035653,d.d2s> &rct=j&q=&esrc=s&source=web&cd=2&cad=rja&uact=8&ved=0CCMQFjAB&url=https%3A%2F%2Fwww.yaskawa.com%2Fpycprd%2Flookup%2Fgetdocument%2FjvgyvE5ZTUY_5CC1znzBof23DM0-2qtf20mzhvc2NVVttd_tKgqgkH4jzlPaKN9jwUZxdmOOXgfix7X3yhLYM72qJQdo3XppBhywnUPr1Oy7mtRZ76i_VGFJpKtk9N9SimCMNzyqbNZCaOJGSoV4BG4Gs6GA9Tys&ei=JY3-U9rQJI6UauyUgJAO&usg=AFQjCNHSkmEEGvsiw09L8yuCE1L46XrLEQ&bvm=bv.74035653,d.d2s)

After i read your posts, i think maybe the problems are as follow:

1. SGDV parameter setting( since i reset all parameter to factory setting)?

2. Sync mode slection?

3. Twincat cycle time setting?

4. Laptop CPU calibrate?

I am appreciated if you  can give any hint to help me solve this error. Next step i would like build the communicate by etherlab master under linux xenomai. There still quite a long way to go.



Best regards!
R&D Engineer

(='.'=) This is Bunny. Copy and paste bunny into your
(")_(") signature to help him gain world domination.


Best regards!
R&D Engineer

(='.'=) This is Bunny. Copy and paste bunny into your
(")_(") signature to help him gain world domination.


Best regards!
R&D Engineer

(='.'=) This is Bunny. Copy and paste bunny into your
(")_(") signature to help him gain world domination.

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