[etherlab-users] FW: Distributed Clock with Yaskawa SGDV drives
Florian Pose
fp at igh-essen.com
Fri Mar 9 17:10:43 CET 2012
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Hi,
Am 08.03.2012 22:24, schrieb Graeme Foot:
> Its effectively due to a race condition between calling
> ecrt_master_activate() and the realtime cycle starting. The slaves
> can get to OP mode before the the hard rt cycle has started.
Why is this?
If you set up the slave configurations, the slaves are *not*
configured to OP before you call ecrt_master_activate(). The OP state
is requested in the master state machine *after* the master has be
activated activation and the system time registers were written.
So again, I don't understand why your slaves are in OP before.
- --
Regards,
Florian
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